FORMULA
an FPGA-based AI RNIC for large-scale AI clusters
FORMULA is an FPGA-based RDMA NIC for large-scale AI clusters, built around a line-rate RoCEv2 engine. It adds multi-path RDMA transport and a programmable congestion control framework to sustain performance at scale, and a configurable block that offloads data-centric processing tasks at line rate — all in a low-profile form factor with software compatibility for deployability.
To appear at the 59th IEEE/ACM International Symposium on Microarchitecture (MICRO-59) Industry Track, Athens, Greece, 2026.